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The IEEC values research as a means to create connections and to open future possibilities in the area of electronics packaging.

  

Pooled Research Projects

Every year, we provide what we call "seed-funding," to propel research opportunities in the direction of capacity building and problem-solving for faculty members in academia.

Skilled researchers partner with industry members to meet real-time project needs of companies. That is, whether you are a chemist, physicist, or mechanical engineer, to name a few, members of all fields carry expertise that is integral in catapulting the metrics of success for projects to reach new heights.

Below are the abstracts of the selected 2022-2023 Pooled Research Projects-a partnership between faculty and mentor companies.

2022-2023 Pooled Research Projects

• Investigation of Light Guiding in Waveguides and Photonic Devices in Glass Fabricated by Femtosecond Laser Micromachining - Bonggu Shim

  In this proposed research, we will first measure and optimize light guiding in waveguides fabricated by femtosecond laser micromachining (FLM).

  Second, we will fabricate multi-mode waveguides and arrays of single-mode waveguides, and eventually photonic lanterns which are signal multiplexing devices connecting a multi-mode waveguide and an array of single-mode waveguides.

  Third, in addition to waveguide fabrication in flexible glass, we will fabricate waveguides and find optimal parameters for waveguide fabrication in glass materials with various optical and thermal properties.

• Laser-based Additive Manufacturing of Copper for Electronic Components using Directed Energy Deposition - Fuda Ning, Mark Poliks

  Pure copper (Cu) exhibits superior performance of electrical and thermal conductivity for its broad application in electronic devices. Additive manufacturing (AM) of Cu shows great promise to fabricate parts with custom structures and tailored functions, yet the high optical reflectivity and oxide formation pose a great challenge.

  In this project, laser-based directed energy deposition (DED) technology is leveraged to efficiently produce defect-free Cu parts with high performance. The objective of this project is to fundamentally understand the DED of Cu to advance the development and integration of additive tools for electronic component manufacturing.

  The project team will explore the effects of process parameters on the defect formation in DED-built Cu parts using both in-situ measurement and ex-situ characterization. In addition, the heat sink prototypes with different geometrical structures will be designed and fabricated by DED. The thermal and electrical properties of various heat sinks will be quantified. The proposed project will provide guidelines for practical applications of Cu electronics fabricated via DED.

• SnBi and SnAgCu based Solder Joints during Current Stressing - Characterizing Failure Mechanisms and Times - Eric Cotts

  The increasing use of eutectic SnBi based, low temperature solders has created a demand for a better understanding of the response of these materials to current stress (1,2). Segregation of Bi to the anode, into a fairly uniform layer, occurs at relatively low temperatures, current densities, and times (3-11). At longer times, higher temperatures or larger current densities, catastrophic failure of the solder joint occurs, with significant cracking of the solder joint and very large increases in electrical resistance (Fig. 1). We have developed a model for each of these behaviors (12).

  In the proposed work we seek to refine these models, and to extend their experimental verification to lower temperatures. We will also examine the effect of solder joint composition on failure rates during current stressing, including current stressing at extreme conditions.

• Soldering Reflow Process Optimization based on the Thermal Profile Prediction with the Physics-Guided Deep Domain Adaptation - Yu Jin

  The soldering reflow process (SRP) is one of the most critical steps in the surface mount technology (SMT) assembly, where the solder paste is melted and then solidated to make the electronic component mounted on the printed circuit board (PCB). To reduce the quality nonconformities, the thermal behavior of the solder joints should be precisely controlled to match the thermal profile specified by the solder joint manufacturer.

  However, the current simulation and machine learning (ML) methods cannot efficiently and effectively predict and monitor the actual thermal performance of solder paste based on the limited experimental data of new designs. A physics-informed ML algorithm conducted in the preliminary study will be further improved with knowledge integration and transfer for the new design domain. Based on the relationship mapped by the proposed thermal prediction model, the process parameters, particularly the reflow oven temperature, will be optimized while considering the constraints regarding the impact of varied component types and interest in reducing the energy consumption for green manufacturing.

  The proposed optimizer will enable manufacturers/line operators to eliminate manual adjustment, hands-on effort to identify the best recipe, and material waste during the process. 

• Interactions Between Electromigration and Fatigue of SnAgCuBi Based Micro Joints Reflowed at Low Temperatures - Nikolay Dimitrov, Peter Borgesen
  There is a general concern with respect to the electromigration resistance of the very small solder joints typical of current and future 2.5/3D assemblies. However, we are not aware of systematic studies of the potential strong enhancement of electromigration by cyclic loading.
  There is also a special interest in minimizing peak reflow temperatures. Unlike at larger dimensions this can be done without reducing the thermal cycling resistance, leading to micro joints with uniform distributions of Sn, Ag, Bi and perhaps Cu. It raises a concern, however, with respect to degradation of the fatigue resistance by electromigration.
  It is proposed to conduct a systematic study of the effects of fatigue on electromigration induced failure, and of electromigration on fatigue resistance, for joints of diameters of 50μm or less. We emphasize that it will be critical for such studies to encompass the solder joint dimensions and compositions of concern.
• Modeling Current Flow through Copper with Rough Surfaces and Voids - Manuel Smeu

  Building on our recent work investigating structural-dependent electron transport, we will now extend our efforts towards metallic surfaces and sinterable copper pastes used in electronics packaging. We will use a combination of density functional theory (DFT) and the non-equilibrium Green’s function technique in conjunction with DFT (NEGF-DFT) to investigate the resistance, conductance, dynamic conductance, and transmission spectra of rough metallic surfaces and sinterable copper pastes.

  From this data we will be able to determine the effect that physical structure has on the electronic properties of these systems, be it due to the roughness of a surface or a void within a sinterable paste. Particularly, we are interested in how rough metallic surfaces and voids in copper paste affect signal insertion loss. Through these efforts, we aim to identify key tradeoffs that our industrial partners leverage in order to produce higher-quality devices.

• Thermal Test Vehicle: Novel Vehicle Using Temperature-Dependent Current Consumption of Electronic Packages - Scott Schiffres, Bahgat Sammakia

  Thermal solutions, especially in terms of heat sinks and thermal interface
  materials, need benchmarking under realistic heating and stress patterns. This project develops a thermal test vehicle that uses a commercial chip that can be programmed to undergo various computational stress patterns (eg stress specific cores or multiple cores, etc). This project will also track the evolution of thermal performance with time for reliability testing.

  Our objective is to develop the tools for a multi-purpose easy to implement thermal test vehicle. The approach will use commercially available chips that can be overclocked and driven in specific region (eg core 1, 2,3, GPU, etc) to measure thermal performance of specific zones. The measurement of thermal performance will use a novel temperature sensing mechanism, that relies on the temperature-dependent electrical consumption to detect individual electronic element current consumption. This internal sensing mechanism complements proximal temperature sensors embedded in chips.

• Integrating Flexible Respiratory Health Sensors into Lightweight Facemasks - Jeffrey Mativetsky, Ahyeon Koh, Zhanpeng Jin

  This project uses a hybrid approach, with disposable and re-usable components, to create a smart mask prototype for respiratory health monitoring under daily life conditions. The disposable components will be printed directly onto low-cost facemasks, while the re-usable wireless electronics module will enable data access on a smartphone. The project will raise the technology readiness of mask-integrated health sensors by addressing processing-function, electronics packaging, and SWaP-C needs. The resulting prototype will serve as a platform for automated artificial intelligence powered health diagnostics and proof-of-concept health monitoring studies. These advances are precursors to improving access to healthcare and enhancing telemedicine, while potentially disrupting the personal protective equipment industry.

• Silver-Copper Nanoalloy Inks and Pastes for Printed Electronics - Chuan-Jian Zhong

  While commercial silver inks or pastes are widely used in electronics, there is an increasing need to reduce the cost and the sintering temperature to meet the demands of printed electronics and wearable sensor technologies. The goal of this project is to develop silver-copper alloy nanoalloy inks/pastes for addressing the demands. Alloying silver with copper in the form of nanoalloys not only reduces the cost but also the sintering temperature, which is critical for printing and interconnecting temperature-sensitive wearable devices on polymer, paper and other fibrous materials.

  This project will develop scalable synthesis routes to silver-copper nanoalloys and a printable ink/paste formulation with room-temperature sintering capability.

  Key objectives in the project period include:

  1) establishing a scalable route for producing composition-controllable and stable silver-copper nanoalloy inks and pastes;

  2) characterizing the factors controlling the room-temperature sintering mechanisms and the stability of the printed nanoalloys on different substrates in terms of adhesion and conductivity; and

  3) fabricating arrays on flexible and fibrous substrates for wearable sensor/biosensor applications.

• Preventing Voiding in BGA/CSP Scale Solder Joints on Plated Ni - Nikolay Dimitrov

  It is proposed to conduct a systematic study to understand phenomenologically and mechanistically a problem certain to be facing a growing number of BGA, CSP and SMT scale solder joints. The common approach for applications requiring multiple reflows and/or extended operation at elevated temperature is to solder to nickel surfaces, but several groups have reported the formation of large voids between the solder and the Ni3Sn4. Importantly, they suggest that this is not preventable if the Ni3Sn4 grows to a thickness of 5 μm or more.

  This problem seems under-reported but the reason this has not been observed more often is that the Ni3Sn4 does not typically grow that thick in most common applications. However, that is about to change as a growing number of applications do involve ever longer operation at ever more elevated temperatures. We propose to work on the development of a comprehensive solution before said problem starts impacting increasingly the packaging industry. In a preliminary work, we have shown phenomenologically the problem to be caused by impurities incorporated in the nickel during plating, and thus preventable. We propose to assess a broad base of Ni-plating routines to identify the specific impurities in question, and to develop manufacturing relevant process guidelines as well as practical approaches to test plated nickel for the problem before soldering.

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